lap 5 digital logic design

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On the last two laps I got poor grade and those laps where done by u I really need ur answer on that. Secondly I have a lap for u to do please do it correctly this time u ARE ONLY TO DO PART 1 AND 3 FROM THE LAP I WILL DO LAP 2. please please do everything according to the instrctions and answer the questions correctly I will provide the lap file and some file to help with it remember part 1 and 3 only. ALSO THE FIRST PART REQUIRE THINGS FROM LAP 4 THE LAP THAT U DID AM ALSO GONE BE PROVIDING THAT AND THE MISTAKES IN IT.

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Lab #5: Hardware Implementation of a 4-Bit
Calculator
In this lab you will build the hardware of a 4-bit Adder-Subtractor using logic gates AND, OR,
NOT, and XORs. This lab is to be done individually.
Part 1: Building the Full-Adder Subtractor in SimUAid
For this first section of the lab, you will construct a 4-bit Full-Adder Subtractor using your
circuit build from Part 1 of Lab #4, but you will add the XOR gate to make your calculator
subtract in 2’complement. Make sure you add probes to each summing bit, and you can also use
Units 3 formula for Sum and Cout function:
(
)
= ⊕ ⨁ ⨁ , ℎ = {0, 1, 2, 3}
(
)
(
)
+1 = ⨁ + + ⨁ , ℎ = (0, 1, 2, 3}
Using Figure 4-3 from the textbook, replace A for X and B for Y. Note that = 0, and each
subsequent will be the from each Full-Adder Subtractor circuit. Remember that you will
not be using the Full-Adder Macro. Note also that the most significant bit (MSB) will be when n
= 3 and the least significant bit (LSB) will be when n=0. This applies to the X and Y inputs and
the Sum outputs.
Questions:
1. Give four examples of A + B using your calculator. (Hint have A>0 + B>0, A>0 + B0 – B
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